With the soon to be released GadgetBox IoT enclosures we have been on the hunt for server solutions to drive our IoT devices. We really like Blynk so far, but it is not free. So when we saw this VPS based solution we knew it was something to put on the list to evaluate!
If anyone gets a chance to check it out we’d love to hear about it in the forums.
Good day FPGA Enthusiasts! FPGAscan be used for a versatile set of applications from real time engineering solutions to building funny games. Today’s post is going to focus on the latter where we build yet another game concept using a FPGA board (you may need to adapt your own). The game in consideration is a simple version of ‘Whack a Mole’. Since the FPGA already has a segment display, Switches and LEDs the peripherals required to run the game are minimum.
The only Hardware required for building this game (you may need more parts depending on your FPGA board) is a FPGA and 3 LEDs (2 of the same color preferably red and one different color preferably white or green). Since only 3 LEDs are being used, you can simply plug them right into the FPGA without using a breadboard or jumpers as shown by the author.
The entire project uses a simple architecture that houses 5 key components which are the LFSR, Score keeper, Clock divider, LED controller and the 7 segment display. Each component significance and working principle has been detailed by the author.
The coding has been done in simple modules and each module has been shared under the corresponding architectural component explanation. The coding language used is VHDL (.vhd) and the code is easy to follow and relate to.
Though the game is fun, there are a few bugs in the code which can be corrected to make the game truly addictive and perfect.
Greetings FPGA lovers! Today’s post takes you into yet another interdisciplinary project that links pure mathematics, FPGA and VHDL to build something beautiful! The Mandelbrot set is a series of complex numbers that tend to infinity when operated upon by a special operator. These numbers when grouped together create a beautiful image sequence which might appear to be chaotic initially. But simplifying the set, we soon find that Mandelbrot’s numbers are nothing but fractals and this concept can be explored and understood visually with FPGA and VHDL.
Today’s project is an FPGA based Fractal explorer that has been built out of the Papilo Duo kit which includes Xilinx Spartan 6 LX9 FPGA, an ATmega 32U4 microcontroller and a 512 MB Static RAM. Some other hardware needed is a basic 7” LCD screen, a Joystick, a few buttons and a rotary encoder.
The colour map shown in the project is navigated by using the joystick to move around, rotary knob to chose colour scheme and the buttons to zoom in and out. These controls are connected to the ATmega 32U4 microcontroller which is interfaced with the FPGA through an SPI interface.
The LCD has been tweaked to display 800 x 600 and the FPGA has also been correspondingly set to process 800 x 600 pixel fractals using the inbuilt DSP 48s. The project is inspired by the Mandelbrot Fractal Generator by Hamster.
Though the code for this project is still unavailable at the moment, you can refer Hamster’s project to get the basic dataflow and code in the C language. Once you do have the logic at hand, the project can easily be converted to the FPGA/VHDL combination instead of the Computer/C combination used by Hamster.
The project is an excellent way to continue learning coding through VHDL and get used to the Papilo Duo Kit.
Hello FPGA lovers! Engineering traditional synth machines using development platforms like Arduino and FPGAs is becoming quite the trend now. Today’s post however takes a twist from the traditional synth machines where sounds are produced by either flicking switches or pressing buttons. The synth machine under discussion is a photosensitive synth machine which uses LDRs interfaced with FPGA in place of button switches and this gives an almost touch screen like feel to the device.
The Hardware required is a FPGA board (adaption may be required), 16 LDRs, 16 high value resistors, a speaker, adequate jumpers and 2 breadboards. The entire project has only 2 sets of hardware implementation off the FPGA board. A speaker is directly wired to the FPGA board besides 16 LDRs which function as the photosensitive keyboard. These LDRs work as a 16 bit Keyboard that inputs signals to the FPGA board to convert to sound signals. The connection diagrams and screen shots are given here.
The coding used for the project has been done in VHDL and the author has given the codes in different modules. The note decoder module on Step 2 is one of the most crucial modules in the whole code as it assigns a particular frequency for the 16 bit value from the LDR keyboard. The sound generator module on Step 4 is the next crucial module as it sends the respective frequency (pitch) values to the speaker interfaced with the FPGA.
Through this link you will find the ucf files for the project. This can be modified according to your convenience in case you would like to add more functionality like sustain buttons and other effects.
Hello FPGA lovers! FPGAs are versatile tools that can be used for research, analysis, engineering applications and entertainment. Today’s project falls into the last category! The nine shine LED game is an interactive game that tests your sense of timing. It consists of an array of LEDs that are turned on sequentially, and you need to press a button exactly when the central LED lights up to progress in the game. The game has been organised into 10 levels by the author with increasing difficulty based on speed to make it fun and challenging.
The project uses an FPGA along with an array of LEDs. The Hardware required for the project is an FPGA Board, USB-to-Micro cable, Eight LEDs, 8 resistors and a Big Dome Pushbutton. To fabricate the setup board for LEDs, the materials required are a wooden board rubber feet, soldering iron and solder, heat shrink, drill, drill bit, hole saw, hot glue gun and insulated electrical wire.
The coding has been done in VHDL and is available in modules in step 2. The author has explained what each module does and its significance in the FPGA system in this step. Right from the FSMs to the main module, the author has gone to great lengths in explaining the code even in fine aspects such as button debouncing issues.
Hello FPGA enthusiasts! Today’s project takes you back to school where you learned the binary system. The author has designed a decimal to binary conversion game using FPGA. It is time to see if you did pay attention in class! The game uses a random number generator which generates any number between 0 and 255. Using the 8 switches on the FPGA, the player needs to guess the binary value right, following which the LEDs glow green. If you do go wrong, the LED matrix glows red showing you guessed incorrectly.
The FPGA board used for this project is the Nexys2 (you may need to adapt yours). It has an LED display, 8 switches and 8 LEDs which are perfectly suited for this project. Besides this some PMOD connectors, an 8×8 LED matrix, resistors, wires, daisy chain wires and 2 breadboards are the other hardware required. Steps 3, 4 and 5 of the project deals with understanding and connecting the hardware used for the project. Since the FPGA has a set of switches and a display, the extra hardware required is less for this project.
The programming language used by the author is VHDL. The program to run on the FPGA is available in step 9 as a zip file. The code has been broken down into modules for ease of understanding. Assigning the pins has been explained in detail in step 10, and the process of creating the bit file to run on the FPGA has been explained in step 11.
Hello Papilio fans today we got an awesome project to share with you! Our forum member jlcollado has managed to migrate the Grant Searle’s brillant work called MULTICOMP to the Papilio DUO, the final result is a very usable and complete Z80 soft-core based machine, running the venerable Digital Research CP/M 2.2 OS.
I’ve built the Z80 CP/M variant, complete with VGA & Keyboard terminal, Serial port, SD-Card and external SRAM. The steps I followed to accomplish this:
1. Adapted the pinouts, ports and some signals of all the modules (Main Interconect, Z80, VGA, Serial, Keyboard, SD-Card) from the original design to fully use the Computing Shield peripherals and the DUO’s SRAM (using and updated Computing Shield UCF file).
2. Converted the original 6 bit color VGA to 12 bit color interface.
3. Converted the internal BIOS ROM and Character Font ROMs, to use Xilinx’s Core Generator’s Block Memory instead of the original Altera Altsyncram IP.
4. Converted the internal double port Display & Attribute RAMs also to use the Core Generator’s Block Memory instead of the original Altera Altsyncram IP.
5. In my first attempt I adapter the CPU and Baudrate clock generators, to use the Papilio’s 32 MHz OSC instead of the original 50 MHz, but I ran into timing problems converting the many clock -dependant constants in the design. So I decided to generate a new 50 MHz clock using the DCM & PLL Wizard.
The Zybo Board is one of the most powerful tools in FPGA and this is because it is FPGA combined with an ARM processor that widens the spectrum of possibilities with FPGA. Today’s post is yet another dive into Zybo’s possibilities and in this project a visualization of audio signals or music will be accomplished. The author has been very detailed about this project and has explained every aspect of it in 18 steps.
The Hardware needed for carrying out this project are the Zybo Zynq 7000 FPGA board, a neo pixel LED matrix, a 5V 10 A power supply, a female DC power adapter, 3 pin male to male header, a 1mF capacitor, an audio splitter and some jumper wires. The connection diagram is provided by the author in step 17.
The code basically uses the principle of FFTs to detect frequency components in the audio file. Depending upon the magnitude of frequencies received, the LED display has been programmed to light up. 16 steps starting from opening Vivado to run the code to generating a bit file for the FPGA has been provided by the author. You can download a zip file which contains all modules relevant to the project. The author has used a combination of C, custom Verilog and HDL to code the project. This gives an ease in defining GPIO ports and makes the circuit a lot simpler.
Another interesting aspect is that the FPGA has been so coded that with the help of switches, your LED matrix can either act as a spectrogram or as a visualizer seen in media players.
Let me challenge you to achieve similar results adapting your own FPGA!