Archive for the ‘VHDL’ Category

New Papilio FPGA tutorial – Create custom clocks of any speed inside an FPGA with the Xilinx clocking wizard.

Thursday, February 23rd, 2017

This tutorial shows you how to generate custom clocks inside your FPGA using the simple Clocking Wizard. Easily create clocks at any speeds such as 100Mhz, 75Mhz, or 50Mhz from the 32Mhz oscillator connected to your Papilio FPGA. The Xilinx clocking wizard easily generates custom clock speeds with all of the Global Clock buffers and supporting circuitry automatically created for you. It is definitely the easiest way to generate custom clocks for your FPGA project.

Step 4 - Clocking Wizard


Find this tutorial and more at GadgetFactory learn website.



How to Whack a Mole with your FPGA, but Not Physically!

Tuesday, November 1st, 2016

Good day FPGA Enthusiasts! FPGAs can be used for a versatile set of applications from real time engineering solutions to building funny games. Today’s post is going to focus on the latter where we build yet another game concept using a FPGA board (you may need to adapt your own). The game in consideration is a simple version of ‘Whack a Mole’. Since the FPGA already has a segment display, Switches and LEDs the peripherals required to run the game are minimum.

The only Hardware required for building this game (you may need more parts depending on your FPGA board) is a FPGA and 3 LEDs (2 of the same color preferably red and one different color preferably white or green). Since only 3 LEDs are being used, you can simply plug them right into the FPGA without using a breadboard or jumpers as shown by the author.

The entire project uses a simple architecture that houses 5 key components which are the LFSR, Score keeper, Clock divider, LED controller and the 7 segment display. Each component significance and working principle has been detailed by the author.

The coding has been done in simple modules and each module has been shared under the corresponding architectural component explanation. The coding language used is VHDL (.vhd) and the code is easy to follow and relate to.

Though the game is fun, there are a few bugs in the code which can be corrected to make the game truly addictive and perfect.

Whack down all those bugs and enjoy!

By fuzmike2

Build your own Mandelbrot Fractal Generator with FPGA

Monday, October 3rd, 2016

Greetings FPGA lovers! Today’s post takes you into yet another interdisciplinary project that links pure mathematics, FPGA and VHDL to build something beautiful! The Mandelbrot set is a series of complex numbers that tend to infinity when operated upon by a special operator. These numbers when grouped together create a beautiful image sequence which might appear to be chaotic initially. But simplifying the set, we soon find that Mandelbrot’s numbers are nothing but fractals and this concept can be explored and understood visually with FPGA and VHDL.

Today’s project is an FPGA based Fractal explorer that has been built out of the Papilo Duo kit which includes Xilinx Spartan 6 LX9 FPGA, an ATmega 32U4 microcontroller and a 512 MB Static RAM. Some other hardware needed is a basic 7” LCD screen, a Joystick, a few buttons and a rotary encoder.

The colour map shown in the project is navigated by using the joystick to move around, rotary knob to chose colour scheme and the buttons to zoom in and out. These controls are connected to the ATmega 32U4 microcontroller which is interfaced with the FPGA through an SPI interface.

The LCD has been tweaked to display 800 x 600 and the FPGA has also been correspondingly set to process 800 x 600 pixel fractals using the inbuilt DSP 48s. The project is inspired by the Mandelbrot Fractal Generator by Hamster.

Though the code for this project is still unavailable at the moment, you can refer Hamster’s project to get the basic dataflow and code in the C language. Once you do have the logic at hand, the project can easily be converted to the FPGA/VHDL combination instead of the Computer/C combination used by Hamster.

The project is an excellent way to continue learning coding through VHDL and get used to the Papilo Duo Kit.


By Larry McGovern

9 Easy Steps to Build a Photosensitive Synth Machine with FPGA

Tuesday, September 27th, 2016

Hello FPGA lovers! Engineering traditional synth machines using development platforms like Arduino and FPGAs is becoming quite the trend now. Today’s post however takes a twist from the traditional synth machines where sounds are produced by either flicking switches or pressing buttons. The synth machine under discussion is a photosensitive synth machine which uses LDRs interfaced with FPGA in place of button switches and this gives an almost touch screen like feel to the device.

The Hardware required is a FPGA board (adaption may be required), 16 LDRs, 16 high value resistors, a speaker, adequate jumpers and 2 breadboards. The entire project has only 2 sets of hardware implementation off the FPGA board. A speaker is directly wired to the FPGA board besides 16 LDRs which function as the photosensitive keyboard. These LDRs work as a 16 bit Keyboard that inputs signals to the FPGA board to convert to sound signals. The connection diagrams and screen shots are given here.

The coding used for the project has been done in VHDL and the author has given the codes in different modules. The note decoder module on Step 2 is one of the most crucial modules in the whole code as it assigns a particular frequency for the 16 bit value from the LDR keyboard. The sound generator module on Step 4 is the next crucial module as it sends the respective frequency (pitch) values to the speaker interfaced with the FPGA.

Through this link you will find the ucf files for the project. This can be modified according to your convenience in case you would like to add more functionality like sustain buttons and other effects.

By Evan_Ashley_Lauren

7-Step Tutorial to Create a Nine Shine LED Timer Game with FPGA

Thursday, September 22nd, 2016

Picture of Nine-Shine-Line: The LED Timing Game

Hello FPGA lovers! FPGAs are versatile tools that can be used for research, analysis, engineering applications and entertainment. Today’s project falls into the last category! The nine shine LED game is an interactive game that tests your sense of timing. It consists of an array of LEDs that are turned on sequentially, and you need to press a button exactly when the central LED lights up to progress in the game. The game has been organised into 10 levels by the author with increasing difficulty based on speed to make it fun and challenging.

The project uses an FPGA along with an array of LEDs. The Hardware required for the project is an FPGA Board, USB-to-Micro cable, Eight LEDs, 8 resistors and a Big Dome Pushbutton. To fabricate the setup board for LEDs, the materials required are a wooden board rubber feet, soldering iron and solder, heat shrink, drill, drill bit, hole saw, hot glue gun and insulated electrical wire.

The coding has been done in VHDL and is available in modules in step 2. The author has explained what each module does and its significance in the FPGA system in this step. Right from the FSMs to the main module, the author has gone to great lengths in explaining the code even in fine aspects such as button debouncing issues.

Read it in full and enjoy!

By Zack Eldredge

Test Your Dec to Bin Conversion Skills with Your FPGA

Tuesday, September 20th, 2016

Hello FPGA enthusiasts! Today’s project takes you back to school where you learned the binary system. The author has designed a decimal to binary conversion game using FPGA. It is time to see if you did pay attention in class! The game uses a random number generator which generates any number between 0 and 255. Using the 8 switches on the FPGA, the player needs to guess the binary value right, following which the LEDs glow green. If you do go wrong, the LED matrix glows red showing you guessed incorrectly.

The FPGA board used for this project is the Nexys2 (you may need to adapt yours). It has an LED display, 8 switches and 8 LEDs which are perfectly suited for this project. Besides this some PMOD connectors, an 8×8 LED matrix, resistors, wires, daisy chain wires and 2 breadboards are the other hardware required. Steps 3, 4 and 5 of the project deals with understanding and connecting the hardware used for the project. Since the FPGA has a set of switches and a display, the extra hardware required is less for this project.

The programming language used by the author is VHDL. The program to run on the FPGA is available in step 9 as a zip file. The code has been broken down into modules for ease of understanding. Assigning the pins has been explained in detail in step 10, and the process of creating the bit file to run on the FPGA has been explained in step 11.

By MaireadB

How to Build an Arcade Obstacle Avoidance Game Using FPGA

Tuesday, September 6th, 2016

Image result for obstacle avoidance game

Hello FPGA innovators! Remember the arcade obstacle avoidance game where blocks of pixels fall on you and you steer clear of them moving left or right? Today’s project attempts to re engineer the same game using a VGA and FPGA. Here, a pseudo random code is used to generate obstacles that fall down and buttons on the FPGA are used to move the cursor so that none of the obstacles hit it.

The only hardware required to execute this project is an FPGA board (you might need to adapt yours if different from the author’s), a computer monitor and connection cables. This is because the FPGA board has inbuilt push buttons that can be used to move the cursor of the game, and also has the necessary DACs and VGA interfaces required to run the game.

The coding done by the author is in VHDL and everything starting from a functional flowchart to running the bit file for FPGA has been described from steps 1 to 9. Since the buttons on the FPGA has a bouncing issue, a separate debouncer code needs to be run which is available on step 2. Details regarding the VGA, coding for random obstacles and checking for collisions and updating the game are given from steps 3 to 7.

Though the authors put in 50+ hours of effort and made a great attempt, the game still could be done in a lot more simpler ways. The main code is available in the introduction to spare other followers from putting in more additional effort, but starting from choosing a different FPGA board to running through basics of other games implemented using VGA and FPGA can end up delivering something better with a lot less effort.

Give it a try and have fun!

Controlling Stepper Motors with Joysticks using FPGA

Thursday, September 1st, 2016

Greetings FPGA innovators! Stepper motors can be an integral part of projects that have a dimension of mobility to them. Be it rovers, robots, drones or claw machines, controlling stepper motors with joysticks is an integral part and FPGAs accomplish speed control easily. Today’s post is about using a FPGA and a joystick to control stepper motors.

The Hardware required for the project is a FPGA board, 2 PmodSTEP drivers, 1 PmodJSTK, 2 Stepper motors, a USB A to B micro cable and 2 12 pin PMOD cables. Since the author is only focused on the control of the stepper motors, the hardware for this project is limited. However it can be expanded based upon the scale of your endeavour.

The code structure is given by the author in step 2. The author has configured the PmodJSTK interface to receive data and not send data to the LEDs on the board. The working principle is pretty simple, where the decoder works out the signals from the Joystick and sends it to the drivers in the form of electrical signals that make the motors turn left, right, stay still or maintain course. The FPGA acts as a simple interconnect between the drivers.  The code has been given in a zip file by the author in step 3.

The coding language used is VHDL and the code is divided into modules. Step 4 has been dedicated to code generation and creation of the executable bit file that can be used on the FPGA. Step 5 illustrates the connections for the project.


By commanderfranz